Jump to content
The first step in today’s COT IC design project is the conversion of the process design rules into the EDA design system’s technology files, and importing the foundation library and the necessary “Magma-Ready IP” blocks into the system.
Magma is working with the industry leading foundation library vendors to ensure that COT IC designers have a rich portfolio of libraries to choose from. These library vendors are delivering products with direct Magma support. Magma support can be provided in 2 equally effective methods using Magma’s unique library qualification and preparation tool called Blast Wrap®.
Method I: Vendor supplied TCL command file (stdlib.tcl)
Assuming that the designer has received the Magma technology and capacitance rules supplied by the foundry or directly from Magma, he can simply import the rules and the COT library into the Magma design system using the vendor supplied stdlib.tcl. He can then proceed to import other “Magma-Ready” IP blocks into the system and compile his own design specific volcano. Volcano is the binary format of the Magma data model.
The advantage of this model is that it gives the designer full visibility and control over compilation of the volcano.
Method II: Library Specific Volcano
Some vendors prefer to provide a library specific volcano whereby the foundry technology and capacitance rules are compiled into the library. The designer will then import the entire volcano into the Magma design system to start designing his IC.
The advantage of this model is that the designer is ensured that the right version of technology rules and capacitance rules are used for a given foundation library.
Magma works closely with our foundation library partners to equip and train them on Magma’s unique Blast Wrap tool. This enables the library partners to perform logical and physical analysis on the libraries, and get early feedback about the quality of the libraries even before starting the design implementation.
Blast Wrap can provide feedback on:
* Logical, timing, physical and electrical aspects of the library * Sufficient range of drive strengths and granularity of drivers * Pin accessibility and routability of the cells * Acceptable gate and diffusion strengths for antenna fixing
In addition, Magma collaborates with the library partners to support the followings:
* Multiple libraries with different PVT conditions * Multi-Vt libraries for automatic power optimization * Noise libraries for integrated Signal Integrity analysis and repair * Special low power libraries with well-tie cells, level shifters, MTCMOS, back-bias cells
MagmaTies Library Partners
* ARM Artisan Physical IP * Virage Logic * TSMC Internal Libraries * Other Library Partners
Specific Library Request
Please complete the request form below or contact foundrysupport@magma-da.com with any additional questions. Contact information is required.
Worst/Best Case Capacitance: Enter if you have a Worst Case or Best Case. For worst and best case cap rules, the customer needs to specify the % variation of intercap models from the typical case.
