Full-chip sign-off validation is a critical challenge for system-on-chip (SoC) design teams. With design sizes often exceeding 50 million gates, and numerous operating modes and corners to validate, the number of engineering change order (ECO) cycles has increased exponentially. This has had an adverse affect on design schedules and time to market.
Magma's Silicon One SoC Sign-off technology, including QCP™ for parasitic extraction, Tekton™ for delay calculation and static timing analysis, and Quartz™ DRC/LVS, provides a fast, accurate, high capacity solution that speeds SoC timing closure and validation.